1. Field of the Invention
The present invention relates to a memory component and particularly to a memory component with improved noise insensitivity of the input amplifiers or receivers, respectively.
2. Description of the Related Art
In previous memory components, the noise sensitivity of the input amplifiers does not represent a limiting factor or a decisive characteristic of the performance of the input amplifiers due to the low speed of the data exchange with external data sources, for example, with a bus or a processor. For this reason, the noise sensitivity of the input amplifiers has not yet been investigated in greater detail or optimized.
High performance input amplifiers of present-day high-speed dynamic Random Access Memories or DRAMs, for example, DDRII SDRAMs, or graphics chips provide a data exchange at speeds or data rates which are so high that the performance of the high performance input amplifiers is restricted by noise being coupled in via the supply, signal and reference signal connections.
Thus, there is a need for an improved memory component which exhibits improved insensitivity particularly with respect to the coupling-in of noise.